Sampler progress

A very interesting thread cropped up on Gearslutz recently, describing the various ways digital synthesizers and samplers implement sample/wavetable playback.

The previous approach I had in mind for my sampler was to use a regular audio codec, some 24 bit, 44.1 KHz thing, attached to an STM32M4F microcontroller. This would work.

What would be more fun, though, is to try and emulate an older, 12-bit design. Going by the taxonomy in that thread, I quickly settled on a high frequency clock, divide-by-n. The basic approach is to use a constant clock well above the desired sample rate, and use a counter or divider to derive the desired rate from it. So if you have a constant 8 MHz clock, you output a sample from your buffer every 1000 clock ticks for an 8 kHz output rate — if the sound was sampled at 8 kHz, this means it’s played back as it was recorded, but if it was sampled at, say, 11 kHz, it will be played slightly slower, resulting in a lower pitch without interpolation.

Looking at the schematics in the Akai S900 service manual (available online — give it a google), it uses an external counter to divide the clock, and a couple of 4×4 bit register files to feed a parallel input 12 bit DAC.

This is all well and good, and could be redone as most of these chips are still available, but things have improved a little since 1986. The STM32F4 has a bunch of on-chip timers that can be used instead of external counters, and buss bandwidths are good enough that you can use SPI DACs for 8 voices and 24 CV outputs (analogue filter/VCA control). I’ve sampled a 12-bit four-way DAC from TI (DAC7615) that should be just about good enough for up to ~40 kHz output rates that would work for one voice + control of one of the simpler Shruti filter boards.


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